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One not so insignificant bug of the K10 architecture seem to be causing more than a few bodies to twist, turn and want to bang their heads over and over again into the closest brick wall. TechReport first reported that the up till now very limited supply of Barcelona processors have been reduced to zero as AMD has stopped shipping out Barcelonas. The reason is rooted in the Translation Lookaside Buffer (TLB) in the L3 cache of the processor. This errata has forced AMD to cancel all shipments to OEM and channel distributors, only specific customers are getting their orders fulfilled, supercomputer companies TechReport suggests.

Previous statements, both public and internal, have implied yield and/or frequency issues, but it seems that this TLB bug is the biggest problem of all. AMD revised the Phenom frequencies (read lowered) just before the launch and later even postponed the higher frequency models of Phenom. Once again yield issues and TLB was suggested, but when speaking to Michael Saucier, Desktop Product Marketing Manager, TechReport found out that the TLB and the lower frequencies are not related.

This error is found in all B2 revision processors, but is said to be fixed with the B3 revision coming Q1. Large quantities are not expected until late Q1, or even Q2 we’ve been told, but with the B3 revision, AMD hopes to bump the frequencies, but not even near those that we’ve previously reported about. Right now there doesn’t seem to any kind of solid launch schedule for the coming Phenom models.

Errata is not uncommon though, and it wasn’t that long ago that Microsoft issued a security patch for Windows that remedied the bug found in the current Intel Core 2 lineup.  

There is a BIOS workaround for the TLB, but it comes with a severe performance penalty of 10-20%, most severe in virtualization environments. The fix simply deactivates the dysfunctional TLB unit but does not disable the L3 cache, which let the processor to continue to work, but at reduced performance.

Linux users can work around it through a Kernel patch which limits the penalty to around 1%. At first the patch was thought to be limited to selected people, but was later released to the public. With the patch there was a detailed description of the bug itself;

”The processor operation to change the accessed or dirty bits of a page translation table entry in the L2 from 0b to 1b may not be atomic. A small window of time exists where other cached operations may cause the stale page translation table entry to be installed in the L3 before the modified copy is returned to the L2. In addition, if a probe for this cache line occurs during this window of time, the processor may not set the accessed or dirty bit and may corrupt data for an unrelated cached operation. The system may experience a machine check event reporting an L3 protocol error has occurred. In this case, the MC4 status register (MSR 0000_0410) will be equal to B2000000_000B0C0F or BA000000_000B0C0F. The MC4 address register (MSR 0000_0412) will be equal to 26h.”

The bug itself causes system hangs during high workloads, like in virtualization systems, but other, more normal, workloads can also trigger the bug and cause the system to hang. You simply have to choose between random hangs or lower performance, you will be able to with an updated version of the OverDrive utility.

While Opteron has been put on hold to OEMs, Phenom is shipping, even though it contains the very same bug;

”In fact, AMD knew about the erratum before the Phenom product launch, although its original statements about the issue gave the impression it only affected Phenoms clocked at 2.4GHz or higher.”

If true, someone at AMD has to be sacrificed to the enthusiast gods, because this is just bad. [Some] Current reviews of AMD Phenom processors has to be revised as well as these have northbridges running at higher frequencies than current retail processors. They also lack the performance-reducing BIOS update.

Last but not least, TechReport has published a short article where they compared performance with and without the TLB patch. Let’s just say there’s a penalty, but it varies from application to applications, and if Phenom was close to keeping up with Core 2 before, it’s looking even less attractive today…

:: Phenom TLB patch benchmarked


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