Intel has decided to reveal a few more details on the three upcoming architectures known as Nehalem, Dunnington and Larabee. Dunnington details was revealed by Sun a while back, and they have now been officially confirmed by Intel. This six-core 1.9 billion transistor processor will feature 16MB L3 cache and be processed using Intel’s 45nm high-k node, and slide right into the current Caneland platform. It’s slated for second half of 2008 and much thanks to the efficient manufacturing process, Dunnington will remain a good performance/watt competitor.
Next, Intel decided to talk Nehalem, the successor to the Core architecture and the Core 2 series. One of the biggest changes with Nehalem is not so much that it’s a new microarchitecture, but that it will use an all new serial interface, QuickPath Interconnect. The Front Side Bus interface is outdated and has led to that AMD and HyperTransport have been able to claim quite a large portion of the server market.
QPI is fast and allows for flexible data transfers with low latencies. Intel has had to compensate for the slow chip-to-chip transfers with large integrated caches, but with QPI, Intel can keep the cache at humble sizes and still remain competitive to AMD’s multi-CPU server systems. In fact, Nehalem will only sport 256KB L2 cache per core, and a shared L3 cache of 8MB. Substantially less than what the Core architecture sports. This will severely reduce the amount of transistor per chip, thus lowering manufacturing costs.
Besides that, Nehalem sports an integrated memory controller and updated SSE instructions. Unlike AMD’s integrated memory controller, Intel’s version supports up to three channels and 18GB of RAM, almost enough to run Windows Vista smoothly. As mentioned above, the key is not the huge amount of memory, but the low latency and the quite excessive bandwidth, up to 32GB/s.
As you can see on the slide above, Nehalem is native quad-core, but there will also be dual- and octo-core models. The latter will foremost be a server option, but may very well become desktop too. The multi-threading performance is suppose to be up to 33% faster than Core, the cache management a lot more efficient and branch prediction even better, and it will NOT feature any features formerly known as HyperThreading, but sport a much improved SMT (Simultaneous MultiThreading) technology. Intel expects Nehalem to ship in Q4, 2008.
Last, but not least, we have the discrete GPU known as Larabee. Intel didn’t reveal much, but did proclaim it to be ”many core”. Last we heard, Larabee uses a scalable array of IA cores with an advanced cache and a new vector instruction set.
A lot of the previous Larabee talk has been about ray tracing and how Larabee will be terrific at it, but the fact is that it will work just great as an ordinary GPU too. Larabee will be compliant with both DirectX and OpenGL. The vector processing unit and the highly programmable architecture makes it a very flexible and powerful processor, no matter if it’s processing HD video or 3D. Public demonstrations are expected to happen late this year, with a launch next year.
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